8-String WLED Driver with Integrated Step-Up
Regulator and SMBus/PWM Dimming Capability
WLED brightness is controlled by turning the WLEDs on
and off with a DPWM signal. The DPWM frequency can
be accurately adjusted with a resistor or directly con-
trolled by the PWMI signal. The brightness of the LEDs
is proportional to the duty cycle of the DPWM signal,
which is controlled externally through either a PWM or
2-wire SMBus-compatible interface, or both. When both
interfaces are used at the same time, the product of the
PWM duty cycle and SMBus command value is used for
the dimming control. This DPWM control provides a dim-
ming range with 8-bit resolution.
The MAX17105 has multiple features to protect the
controller from fault conditions. Separate feedback
loops limit the output voltage in all circumstances. The
MAX17105 checks s each FB_ voltage during the opera-
tion. If one or more strings are open, the corresponding
FB_ voltages are pulled below 220mV (typ), and an
open-circuit fault is detected. As a result, the respective
current sources are disabled. When one or more LEDs
are shorted and the FB_ voltage exceeds 8V, a short
fault is detected and the respective current source is
disabled. In either LED open or short conditions, the fault
strings are disabled while other strings can still operate
normally. The controller features cycle-by-cycle current
limit to provide consistent operation and soft-start pro-
tection. In a current-limit condition, the controller shuts
down after a 128 F s overcurrent fault timer expires. A
thermal-shutdown circuit provides yet another level of
protection.
The MAX17105 includes a 5V linear regulator that pro-
vides the internal bias and gate driver for the step-up
controller.
Fixed-Frequency Step-Up Controller
The MAX17105’s fixed-frequency, current mode, step-up
controller automatically chooses the lowest active FB_
voltage to regulate the feedback voltage. Specifically,
the difference between the lowest FB_ voltage and the
current source control signal plus an offset (VSAT) is
integrated at the COMP output. The resulting error signal
is compared to the external switch current plus slope
compensation to determine the switch on-time. As the
load changes, the error amplifier sources or sinks current
to the COMP output to deliver the required peak inductor
current. The slope-compensation signal is added to the
current-sense signal in order to improve stability at high
duty cycles.
Internal 5V Linear Regulator and UVLO
The MAX17105 includes an internal low-dropout (LDO)
linear regulator (V CC ). When V IN is higher than 5.5V, this
linear regulator generates a 5V supply to power the inter-
nal PWM controller, control logic, and MOSFET driver.
The V CC voltage drops to 4.5V in standby. If V IN is less
than or equal to 5.5V, V CC and IN can be connected
together and powered from an external 5V supply. There
is a body diode from V CC to IN, so V IN must be greater
than V CC . (See Figure 2.)
The MAX17105 includes power-on reset (POR) and
undervoltage lockout (UVLO) features. POR resets the
fault latch and sets all the SMBus resisters to their POR
values. POR occurs when V CC rises above 2.8V (typ).
The controller is disabled until V CC exceeds the UVLO
threshold of 4.3V (typ). The hysteresis on V CC UVLO is
approximately 85mV.
In standby mode, the internal LDO is low-power mode
with 60μA (max) input current and regulated at 4.5V
(typ). When EN is high in direct-PWM mode or an
ENABLE command through the SMBus interface, the
internal LDO is enabled and regulated at 5.0V (typ). In
addition to V CC UVLO, the MAX17105 has also imple-
mented an IN UVLO function. This IN UVLO function is
not activated in direct-PWM mode. However, when the
controller is enabled with SMBus, the IN UVLO feature is
enabled. If the IN voltage is below its UVLO threshold,
the step-up converter is shut off.
The V CC pin should be bypassed to SGND with a mini-
mum 1 F F ceramic capacitor.
Startup
The MAX17105 has two operating modes: direct-PWM
mode and SMBus mode. The two modes are identified
by the DFSET pin. At the first enable signal, either EN =
high or an SMBus ENABLE command, the DFSET pin
sources a current to check whether the DFSET pin is
connected to SGND. When the DFSET voltage is lower
than 210mV (typ), the MAX17105 is set for direct-PWM
mode. Otherwise, the MAX17105 is set for SMBus mode.
Once the mode is set, the mode is not cleared until the
VCC is lower than the POR voltage. When the MAX17105
is set for SMBus mode, the EN pin signal is ignored
and the MAX17105 is woken by the SMBus ENABLE
command. When the MAX17105 is set for direct-
PWM mode, the SMBus command is ignored and
the MAX17105 is woken by the EN signal. Table 3
summarizes the operating mode.
_______________________________________________________________________________________
15
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